Cadence University Program Member

North Dakota State University

 

The ECE Department acknowledges the generous support of Cadence Design Systems through their university program.


Cadence Tutorials:


Research Projects:

    Energy Harvesting

    Doppler Pulse Flow meter

    High-Speed FPGA

    High-Q Inductor Analysis, Modeling and Simulation.


Classes:

ECE 721 Introduction to CMOS circuit. circuit characterization and performance estimation, CMOS circuit and logic design, CMOS testing.


Important Setting of Cadence:

CDS_INST_DIR=/cad/cds/ICXXX

CDS_LOAD_ENV=CWD

CDS_LOG_PATH=$HOME

CDS_LIC_FILE=5280@XXX.XXX.XXX

CDS_Netlisting_Mode=Analog

LD_ASSUME_KERNEL=2.4.1


In order to run Cadence on Fedora, following settings have to be set asimenv.startup cds_ade_wftool string "awd" (This will enable the AWD window instead of wavescan)

libInit.il file of the bicmos7HP has to be modified to support IC5.1 (only 5.0 was supported)


Information is provided "as is" without warranty or guarantee of any kind. No statement is made and no attempt has been made to examine the information, either with respect to operability, origin, authorship, or otherwise. Please use this information at your own risk - and any attempt to use this information is at your own risk - we recommend using it on a copy of your data to be sure you understand what it does and under your conditions. Keep your master intact until you are personally satisfied with the use of this information within your environment.


Cadence is a registered trademark of Cadence Design Systems, Inc., 2655 Seely Avenue, San Jose, CA 95134.


Page maintained by Chao You (chao.you@ndsu.edu)


Last update Sep 23, 2011