Conformal Computing Research Program

First conformal computing prototype

The Conformal Computing program is being pursued by NDSU's Center for Nanoscale Science and Engineering (CNSE) in collaboration with the Massachusetts Institute of Technology's Center for Bits and Atoms (CBA). It is a multi-year program funded by the Intelligence Advanced Research Projects Agency (IARPA) and managed by the Defense Microelectronics Activity (DMEA).

The program was established to develop a new kind of computer, which, among other things, can physically conform to surfaces and volumes. These computers, called conformal computers, would use small building blocks that can easily be assembled to provide the right amount of computation needed by a particular application. To make Conformal Computing a reality, the program includes investigations into multiple areas, including the architecture, design, assembly, and use of such computers. The program will work to embed the computing components into a new type of raw material that could be painted, poured, sprayed or unrolled onto surfaces.

One of the first things CNSE did was to demonstrate what is achievable today using a scalable architecture and closely packing small commercially-available components. The result was a pair of prototypes that began to approximate a "wallpaper" form of a computer that integrates parallel processing with an LED display. The first of these prototypes had a 2x2 array of processors coupled with an 8x8 array of RGB pixels.

This was followed by an 8x8 array of the same design, packing a total of 64 processors and 1024 RGB pixels on the two sides of roughly 10 square inches of a single printed circuit board (PCB). As further scaling is pursued, matters like power distribution, synchronization, and real-time faults demand greater attention.

8x8 processor array; total of 64 processors            32x32 pixel array; total of 1024 RGB pixels

Dr. Mark Pavicic, Senior Research Scientist
NDSU Center for Nanoscale Science & Engineering
PI, Conformal Computing Program 701.231.7501

This material is based on research sponsored by the Defense Microelectronics Activity under agreement number H94003-07-2-0707 and prior agreements.